• Home
  • About
    • Gyujun Jeong photo

      Gyujun Jeong

      Gyujun Jeong's Portfolio Website

    • Learn More
    • LinkedIn
  • Posts
    • All Posts
    • All Tags

Projects by Group

  • 1_Georgia_Tech 4
  • 1_Georgia_Tech 4
  • 2_SIGINT_Agency 2
  • 3_Samsung_Electronics 12
  • 4_ICSL_KAIST 6
  • 5_HSNL_KAIST 6
  • IRPS
  • PINN 1
  • Semiconductor_processing 4



1_Georgia_Tech


  • Accelerating Semiconductor Design: AI Surrogate Modeling with PINO using NVIDIA PhysicsNeMo Framework
  • IBM Analog Hardware Accelerator Kit Research Archive
  • From Theory to Tapeout: SAR-ADC Full-custom IC Design Project
  • Georgia Tech ML Compact Model Research Archive

1_Georgia_Tech


  • Accelerating Semiconductor Design: AI Surrogate Modeling with PINO using NVIDIA PhysicsNeMo Framework
  • IBM Analog Hardware Accelerator Kit Research Archive
  • From Theory to Tapeout: SAR-ADC Full-custom IC Design Project
  • Georgia Tech ML Compact Model Research Archive

2_SIGINT_Agency


  • LoRa/CSS: Overview, Demodulation and Decoding
  • GUI development with PyQT

3_Samsung_Electronics


  • An impression and final report for Samsung Electronics Internship
  • ISSCC Paper Review: THz Imager by Yokoyama(2019)
  • PMC: Power Management IP on CIS utilizing Cyclic ADC
  • TMC: Temperature Management on CIS using chopper
  • ABBG: Adaptive Body Bias Generator in CIS
  • JSSC Paper Study: Rail-to-Rail Op-Amp by Hogervost(1994)
  • DBR: Doubler of CIS
  • Ramp: Single Slope ADC
  • Designing the Reference Block
  • ISSCC Paper Review: LiDAR Sensor using TDC/ADC hybrid SoC by Yoshioka(2018)
  • EDA tools: Cadence Spectre and HSPICE
  • Introduction to CMOS Image Sensor

4_ICSL_KAIST


  • Study Notes for Analog CMOS IC Design
  • Study Notes for RF Microelectronics
  • Unity Gain Buffer Design
  • Cadence Virtuoso Manual
  • Modeling Periodic Jitter Sensor using Stochastic TDC without Reference Clock with Simulink
  • ISSCC 2018 Paper: Period Jitter-Sensor Using Stochastic TDC

5_HSNL_KAIST


  • Report for 2019 Winter Semester Individual Research
  • BSIM Models: Device Modeling
  • Isolation Technique
  • Backend of IC process
  • Scaling Trend of Semiconductor
  • 3D FET Structure: FinFET and GAAFET

IRPS


PINN


  • IRPS 2026: PINN-Assisted Compact Modeling for nvCAP Arrays

Semiconductor_processing


  • Application on the Semiconductor Devices and Deposition Method
  • Issues and Solutions of the Modern Semiconductor IC Technology
  • Silvaco Simulation to minimize Bird’s Beak
  • Improving Device Performance Using Isotope of Phosphorus